AMD Ryzen 3000 release date, price, specs and everything we know
For the past decade or more, AMD has been in second place in the CPU wars. It’s not for lack of experimentation, the Ryzen processors of the past two years have certainly changed the game in the race to offer the best CPU. Intel is still winning in multiple areas — especially gaming — but that could all change with the introduction of the third-generation Ryzen CPUs.
Using the Zen 2 architecture and leading 7nm process technology provided by TSMC, this is the first time AMD has a manufacturing node advantage over rival Intel. That’s huge, and it gives AMD a legitimate chance at the CPU throne. It’s not just multithreaded workloads – we don’t have independent numbers yet, but AMD could even lead Intel in gaming performance.
Here’s everything we know about the upcoming Ryzen 3000 series’ features, architecture, pricing, models, specs, and release date.
Decoding code
All of AMD’s current processors are based on some form of Zen, which is the name of its modern CPU architecture for every processor category – desktops, laptops, all-in-ones, servers, and more. While generally easier to follow than Intel’s many different CPU architectures, it can still be confusing. Let’s clarify. Here are the Zen versions, along with their corresponding codenames and desktop processor families:
- Zen (“Top Ridge”)——Ryzen 1000 series
- Zen+ (“Peak Ridge”)——Ryzen 2000 series
- Zen 2 (“Matisse”)——Ryzen 3000 series
- Zen 3 (“Pending”)– Ryzen 4000 series?
- Zen 4 (“Pending”)——Ryzen 5000 series?
Zen 2 is actually the third iteration of the Zen microarchitecture and is attached to AMD’s upcoming Ryzen 3000 series. AMD’s first-generation Ryzen processors (Zen) were fabricated using a 14nm FinFET process. For the second-generation Ryzen parts (Zen+), AMD moved to the 12nm node, but made only minor updates to the architecture. The upcoming Ryzen 3000-series (Zen 2) processors are built on the 7nm node and include significant changes to the underlying architecture as well as chip shrinks. Then in 2020 (likely), AMD will unveil its Zen 3 series, which is based on the enhanced 7nm+ node. Additionally, AMD says Zen 3 is “on track” and the subsequent Zen 4 architecture is currently “in the design phase.”
I should note that there are more codenames than the above. I’m labelling AMD’s mainstream desktop processors by name, but the company’s CPUs with Vega graphics (essentially APUs, or accelerated processing units) and Epyc server chips also have codenames. To add to the confusion, the 2000 series APUs (eg, 2200G and 2400G) are first-gen Zen architecture parts, and there are two new desktop APUs, the Ryzen 3 3200G and Ryzen 5 3400G, which are using the second-gen Zen+ architecture built.
Ryzen 3000 series specs and pricing
AMD has now officially announced six third-generation Ryzen CPUs, as well as two Ryzen 3000 desktop APUs. As expected after the first real look at the processors at CES, there will be two different varieties of Ryzen 3000 – and possibly a third once the Zen 2 APUs arrive. I’ll detail why certain changes were made in a moment, but AMD now has a cIOD (Client IO chip) made at 12nm, which consists of a memory controller and other aspects of the chipset. This in turn is linked to one or two CCDs – the actual Ryzen CPU cores and cache. Ryzen 9 parts will have two CCD chips in the package along with the cIOD, while Ryzen 5 and Ryzen 7 will have one CCD. Here’s what we know about the actual Ryzen 3000 lineup:
- Ryzen 9 3950X—16C/32T, 3.5GHz to 4.7GHz, 72MB cache, 105W TDP, $749 (September)
- Ryzen 9 3900X—12C/24T, 3.8GHz to 4.6GHz, 70MB cache, 105W TDP, $499
- Ryzen 7 3800X—8C/16T, 3.9GHz to 4.5GHz, 36MB cache, 105W TDP, $399
- Ryzen 7 3700X—8C/16T, 3.6GHz to 4.4GHz, 36MB cache, 65W TDP, $329
- Ryzen 5 3600X—6C/12T, 3.8GHz to 4.4GHz, 35MB cache, 95W TDP, $249
- Ryzen 5 3600—6C/12T, 3.6GHz to 4.2GHz, 35MB cache, 65W TDP, $199
- Ryzen 5 3400G— (Zen+) 4C/8T, 3.7GHz to 4.2GHz, 6MB cache, Vega 11 graphics at 1400MHz, 65W TDP, $149
- Ryzen 3 3200G—(Zen+) 4C/4T, 3.6GHz to 4.0GHz, 6MB cache, Vega 8 graphics at 1250MHz, 65W TDP, $99
All of the above, except the 3950X, will be available on July 7 — including two second-generation Zen+ APUs. There may be additional Ryzen 3000 parts, but that’s what AMD has revealed so far. There may be lower-priced 4C/8T or 4C/4T Ryzen 3 models at some point, but these will at least partially overlap the APU and may not be necessary.
Prices for the Ryzen 3000 parts are significantly higher than previously rumored (and guesswork), and the clock speeds may not be as high as some would like. Performance isn’t just about clock speeds, however, and power requirements are often much lower than competing Intel parts. Now let’s dig into some lower-level details to better understand AMD’s plans.
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Zen 2 Architecture
Zen 2 isn’t just about shrinking the chip, it’s moving to a smaller 7nm manufacturing process. Smaller process nodes often mean better power efficiency, potentially higher clock speeds and higher density — or more transistors in the same size chip. All of these benefits seem to be part of a Ryzen 3000 processor, but there’s a lot going on under the hood. AMD claims IPC (instructions per clock) 15% higher than Zen+. This means that for the same number of cores and the same clock speed, Zen 2 should be 15% faster. But how did AMD get this 15% improvement? It’s all in the architectural details.
I’ve already mentioned a major change in the Zen 2 design, moving the memory controller to a separate IO chip. This has a latency penalty compared to previous Ryzen CPUs, but it has the benefit of not having significantly different memory latency when migrating to a dual-chip design like Ryzen 9. But according to AMD, the increase in memory latency is ultimately mostly a matter of debate, thanks to other architectural changes.
A major update is the doubling of the L3 cache size. On a single chiplet Ryzen 5/7 part, there is a 32MB victim cache – which means, data in the L2 cache is not copied into the L3 cache (use an exclusive cache if you prefer). Meanwhile, the dual chiplet Ryzen 9 CPU is equipped with 64MB of L3 cache. Due to a unique cache design, AMD increased the size of the L2 and L3 caches and called them the game cache. Each core has 512KB of L2 cache, which gives the 6-core Ryzen 5 chip 35MB of game cache, the 8-core Ryzen 7 part has 36MB of game cache, the 12-core has 70MB of game cache, and the Big Daddy 16-core 3950X has 72MB of game cache.
What effect do those huge cache sizes have on memory latency? AMD says effective memory latency is reduced by an average of 33ns compared to Zen+, which in turn can boost performance by up to 21% — and that’s true in gaming as well. The larger L3 cache size does cause a slight increase in cache latency – typical L3 cache latency is now 40-45 cycles, compared to 35-40 cycles for Zen – but compared to system memory latency of around 200 cycles Than, the benefits should be considerable. If you keep tracking, the L1 cache latency is still 4 cycles and the L2 cache latency is 12 cycles.
Along with the larger cache, AMD added a new TAGE branch predictor in Zen 2. We can get into a lot of technical details, but fundamentally incorrect branch predictions can lead to considerable performance penalties – the 19-stage pipeline gets flushed and restarted, so every branch miss is a significant opportunity for performance improvement. Zen 2 kept the Perceptron branch predictor for the L1 cache (which already worked well), but added a more sophisticated TAGE branch predictor for the L2 cache. The end result is that AMD says Zen 2 will reduce bad branch predictions by 30%.
In the execution unit, AMD also added a third AGU (Address Generation Unit). This gives Zen 2 7 execution ports, but still can only schedule up to 6 instructions per clock. However, in enough cases, the CPU can use another AGU, which obviously makes sense.
Another change is floating point (FP) performance, AMD doubled the AVX performance. Zen and Zen+ have a two-cycle latency for AVX256 instructions, while Zen 2 is single-cycle. There is a related change in load and store bandwidth, which is now 256 bits wide instead of 128 bits. Additionally, the multiply delay is three cycles, down from four cycles. This probably won’t have much impact on all workloads, but for applications using AVX2, the benefits should be considerable.
Zen 2’s support for PCIe 4.0 is not directly applicable to CPU architectures. This doubles the bandwidth between the CPU and chipset and the M.2 socket. It should also increase the bandwidth between the CCD and cIOD within the package, as these Infinity Fabric links may also be derived from PCIe 4.0. What PCIe 4.0 means in the real world is unclear. SSDs that support the new standard are coming soon and will provide higher throughput than existing M.2 NVMe SSDs. But for gaming purposes, neither the GPU nor storage matters.
There are many other tweaks in Zen 2 – larger 4K micro-op cache, larger 180 entry register rename space (up from 168), increased L1/L2 BTB tables (512 L1 vs 256, 7K L2 vs 4K), moved from 64K 4-way associative L1 cache to 32K 8-way L1 cache, 224 reorder buffers (compared to 192), etc. These are highly technical things you need to be a microprocessor engineer to understand properly, but the bottom line is that Zen 2 ends up being better than Zen/Zen+ in almost every way.
How much better? I’ll get to AMD’s claims later, but an interesting point that came out of discussions with AMD’s CPU experts is that even Zen 2’s theoretical maximum IPC is 6.0 (if it fills every possible instruction schedule every cycle) ) In the real world, the IPC for most applications is only about 1.5. With more predictable workloads, the IPC can be as high as 3.0, other complex workloads IPC drop to 0.25, but the average Zen 2 hits 1.5. Larger caches, improved branch prediction, additional AGUs, larger buffers, and other architectural changes are all ways to improve IPC.
AMD Ryzen 3000 Performance
AMD has set high expectations for Zen 2, claiming an average 15% improvement in IPC relative to Zen+. This 15% improvement comes from all of the above architectural updates, combined with higher clock speeds and core counts, and performance should be a big step up for the Ryzen 2000 series. But it’s not just about the hardware, there are some software changes that come into play as well.
One of the big problems AMD has with its Ryzen and Threadripper CPUs is that Windows simply doesn’t have a great process scheduler for designs like Zen/Zen+/Zen 2. Specifically, L3 cache latency is worse on AM4 processors when a thread runs on one CCX (Core CompleX – a set of four CPU cores and their cache and other bits) and accesses L3 cache stored on another CCX data in . This increases memory latency, and threads from the same application are preferably grouped on the same CCX if possible.
The Windows 10 May 2019 Update improves the Windows scheduler, and in conjunction with the new AMD chipset driver (not yet available to the public), thread scheduling should be better. This can improve performance by 5-10% for some workloads and will be available for all Ryzen and Threadripper platforms when the new CPUs are introduced. It’s unclear how much of the performance gains AMD showed in the slides came from Zen 2 alone…
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